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Results from working analog VLSI implementations of two different pulse stream neural network forms are reported. The circuits are rendered relatively invariant to processing variations, and the problem of cascadability of synapses to form large systems is addressed. A strategy for interchip communication of large numbers of neural states has been implemented in silicon and results are presented. The circuits demonstrated confront many of the issues that blight massively parallel analog systems, and offer solutions.

Original publication

DOI

10.1109/72.129411

Type

Journal article

Journal

IEEE transactions on neural networks

Publication Date

01/1992

Volume

3

Pages

385 - 393

Addresses

Dept. of Electr. Eng., Edinburgh Univ.